|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; jidctred.asm - reduced-size IDCT (64-bit SSE2)
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB</ossman@cendio.se>
|
|
shun-iwasawa |
82a8f5 |
; Copyright (C) 2009, 2016, D. R. Commander.
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; Based on the x86 SIMD extension for IJG JPEG library
|
|
shun-iwasawa |
82a8f5 |
; Copyright (C) 1999-2006, MIYASAKA Masaru.
|
|
shun-iwasawa |
82a8f5 |
; For conditions of distribution and use, see copyright notice in jsimdext.inc
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; This file should be assembled with NASM (Netwide Assembler),
|
|
shun-iwasawa |
82a8f5 |
; can *not* be assembled with Microsoft's MASM or any compatible
|
|
shun-iwasawa |
82a8f5 |
; assembler (including Borland's Turbo Assembler).
|
|
shun-iwasawa |
82a8f5 |
; NASM is available from http://nasm.sourceforge.net/ or
|
|
shun-iwasawa |
82a8f5 |
; http://sourceforge.net/project/showfiles.php?group_id=6208
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; This file contains inverse-DCT routines that produce reduced-size
|
|
shun-iwasawa |
82a8f5 |
; output: either 4x4 or 2x2 pixels from an 8x8 DCT block.
|
|
shun-iwasawa |
82a8f5 |
; The following code is based directly on the IJG's original jidctred.c;
|
|
shun-iwasawa |
82a8f5 |
; see the jidctred.c for more details.
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
%include "jsimdext.inc"
|
|
shun-iwasawa |
82a8f5 |
%include "jdct.inc"
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; --------------------------------------------------------------------------
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
%define CONST_BITS 13
|
|
shun-iwasawa |
82a8f5 |
%define PASS1_BITS 2
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
%define DESCALE_P1_4 (CONST_BITS - PASS1_BITS + 1)
|
|
shun-iwasawa |
82a8f5 |
%define DESCALE_P2_4 (CONST_BITS + PASS1_BITS + 3 + 1)
|
|
shun-iwasawa |
82a8f5 |
%define DESCALE_P1_2 (CONST_BITS - PASS1_BITS + 2)
|
|
shun-iwasawa |
82a8f5 |
%define DESCALE_P2_2 (CONST_BITS + PASS1_BITS + 3 + 2)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
%if CONST_BITS == 13
|
|
shun-iwasawa |
82a8f5 |
F_0_211 equ 1730 ; FIX(0.211164243)
|
|
shun-iwasawa |
82a8f5 |
F_0_509 equ 4176 ; FIX(0.509795579)
|
|
shun-iwasawa |
82a8f5 |
F_0_601 equ 4926 ; FIX(0.601344887)
|
|
shun-iwasawa |
82a8f5 |
F_0_720 equ 5906 ; FIX(0.720959822)
|
|
shun-iwasawa |
82a8f5 |
F_0_765 equ 6270 ; FIX(0.765366865)
|
|
shun-iwasawa |
82a8f5 |
F_0_850 equ 6967 ; FIX(0.850430095)
|
|
shun-iwasawa |
82a8f5 |
F_0_899 equ 7373 ; FIX(0.899976223)
|
|
shun-iwasawa |
82a8f5 |
F_1_061 equ 8697 ; FIX(1.061594337)
|
|
shun-iwasawa |
82a8f5 |
F_1_272 equ 10426 ; FIX(1.272758580)
|
|
shun-iwasawa |
82a8f5 |
F_1_451 equ 11893 ; FIX(1.451774981)
|
|
shun-iwasawa |
82a8f5 |
F_1_847 equ 15137 ; FIX(1.847759065)
|
|
shun-iwasawa |
82a8f5 |
F_2_172 equ 17799 ; FIX(2.172734803)
|
|
shun-iwasawa |
82a8f5 |
F_2_562 equ 20995 ; FIX(2.562915447)
|
|
shun-iwasawa |
82a8f5 |
F_3_624 equ 29692 ; FIX(3.624509785)
|
|
shun-iwasawa |
82a8f5 |
%else
|
|
shun-iwasawa |
82a8f5 |
; NASM cannot do compile-time arithmetic on floating-point constants.
|
|
shun-iwasawa |
82a8f5 |
%define DESCALE(x, n) (((x) + (1 << ((n) - 1))) >> (n))
|
|
shun-iwasawa |
82a8f5 |
F_0_211 equ DESCALE( 226735879, 30 - CONST_BITS) ; FIX(0.211164243)
|
|
shun-iwasawa |
82a8f5 |
F_0_509 equ DESCALE( 547388834, 30 - CONST_BITS) ; FIX(0.509795579)
|
|
shun-iwasawa |
82a8f5 |
F_0_601 equ DESCALE( 645689155, 30 - CONST_BITS) ; FIX(0.601344887)
|
|
shun-iwasawa |
82a8f5 |
F_0_720 equ DESCALE( 774124714, 30 - CONST_BITS) ; FIX(0.720959822)
|
|
shun-iwasawa |
82a8f5 |
F_0_765 equ DESCALE( 821806413, 30 - CONST_BITS) ; FIX(0.765366865)
|
|
shun-iwasawa |
82a8f5 |
F_0_850 equ DESCALE( 913142361, 30 - CONST_BITS) ; FIX(0.850430095)
|
|
shun-iwasawa |
82a8f5 |
F_0_899 equ DESCALE( 966342111, 30 - CONST_BITS) ; FIX(0.899976223)
|
|
shun-iwasawa |
82a8f5 |
F_1_061 equ DESCALE(1139878239, 30 - CONST_BITS) ; FIX(1.061594337)
|
|
shun-iwasawa |
82a8f5 |
F_1_272 equ DESCALE(1366614119, 30 - CONST_BITS) ; FIX(1.272758580)
|
|
shun-iwasawa |
82a8f5 |
F_1_451 equ DESCALE(1558831516, 30 - CONST_BITS) ; FIX(1.451774981)
|
|
shun-iwasawa |
82a8f5 |
F_1_847 equ DESCALE(1984016188, 30 - CONST_BITS) ; FIX(1.847759065)
|
|
shun-iwasawa |
82a8f5 |
F_2_172 equ DESCALE(2332956230, 30 - CONST_BITS) ; FIX(2.172734803)
|
|
shun-iwasawa |
82a8f5 |
F_2_562 equ DESCALE(2751909506, 30 - CONST_BITS) ; FIX(2.562915447)
|
|
shun-iwasawa |
82a8f5 |
F_3_624 equ DESCALE(3891787747, 30 - CONST_BITS) ; FIX(3.624509785)
|
|
shun-iwasawa |
82a8f5 |
%endif
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; --------------------------------------------------------------------------
|
|
shun-iwasawa |
82a8f5 |
SECTION SEG_CONST
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
alignz 32
|
|
shun-iwasawa |
82a8f5 |
GLOBAL_DATA(jconst_idct_red_sse2)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
EXTN(jconst_idct_red_sse2):
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
PW_F184_MF076 times 4 dw F_1_847, -F_0_765
|
|
shun-iwasawa |
82a8f5 |
PW_F256_F089 times 4 dw F_2_562, F_0_899
|
|
shun-iwasawa |
82a8f5 |
PW_F106_MF217 times 4 dw F_1_061, -F_2_172
|
|
shun-iwasawa |
82a8f5 |
PW_MF060_MF050 times 4 dw -F_0_601, -F_0_509
|
|
shun-iwasawa |
82a8f5 |
PW_F145_MF021 times 4 dw F_1_451, -F_0_211
|
|
shun-iwasawa |
82a8f5 |
PW_F362_MF127 times 4 dw F_3_624, -F_1_272
|
|
shun-iwasawa |
82a8f5 |
PW_F085_MF072 times 4 dw F_0_850, -F_0_720
|
|
shun-iwasawa |
82a8f5 |
PD_DESCALE_P1_4 times 4 dd 1 << (DESCALE_P1_4 - 1)
|
|
shun-iwasawa |
82a8f5 |
PD_DESCALE_P2_4 times 4 dd 1 << (DESCALE_P2_4 - 1)
|
|
shun-iwasawa |
82a8f5 |
PD_DESCALE_P1_2 times 4 dd 1 << (DESCALE_P1_2 - 1)
|
|
shun-iwasawa |
82a8f5 |
PD_DESCALE_P2_2 times 4 dd 1 << (DESCALE_P2_2 - 1)
|
|
shun-iwasawa |
82a8f5 |
PB_CENTERJSAMP times 16 db CENTERJSAMPLE
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
alignz 32
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; --------------------------------------------------------------------------
|
|
shun-iwasawa |
82a8f5 |
SECTION SEG_TEXT
|
|
shun-iwasawa |
82a8f5 |
BITS 64
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; Perform dequantization and inverse DCT on one block of coefficients,
|
|
shun-iwasawa |
82a8f5 |
; producing a reduced-size 4x4 output block.
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; GLOBAL(void)
|
|
shun-iwasawa |
82a8f5 |
; jsimd_idct_4x4_sse2(void *dct_table, JCOEFPTR coef_block,
|
|
shun-iwasawa |
82a8f5 |
; JSAMPARRAY output_buf, JDIMENSION output_col)
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; r10 = void *dct_table
|
|
shun-iwasawa |
82a8f5 |
; r11 = JCOEFPTR coef_block
|
|
shun-iwasawa |
82a8f5 |
; r12 = JSAMPARRAY output_buf
|
|
shun-iwasawa |
82a8f5 |
; r13d = JDIMENSION output_col
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
%define original_rbp rbp + 0
|
|
shun-iwasawa |
82a8f5 |
%define wk(i) rbp - (WK_NUM - (i)) * SIZEOF_XMMWORD
|
|
shun-iwasawa |
82a8f5 |
; xmmword wk[WK_NUM]
|
|
shun-iwasawa |
82a8f5 |
%define WK_NUM 2
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
align 32
|
|
shun-iwasawa |
82a8f5 |
GLOBAL_FUNCTION(jsimd_idct_4x4_sse2)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
EXTN(jsimd_idct_4x4_sse2):
|
|
shun-iwasawa |
82a8f5 |
push rbp
|
|
shun-iwasawa |
82a8f5 |
mov rax, rsp ; rax = original rbp
|
|
shun-iwasawa |
82a8f5 |
sub rsp, byte 4
|
|
shun-iwasawa |
82a8f5 |
and rsp, byte (-SIZEOF_XMMWORD) ; align to 128 bits
|
|
shun-iwasawa |
82a8f5 |
mov [rsp], rax
|
|
shun-iwasawa |
82a8f5 |
mov rbp, rsp ; rbp = aligned rbp
|
|
shun-iwasawa |
82a8f5 |
lea rsp, [wk(0)]
|
|
shun-iwasawa |
82a8f5 |
collect_args 4
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; ---- Pass 1: process columns from input.
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
mov rdx, r10 ; quantptr
|
|
shun-iwasawa |
82a8f5 |
mov rsi, r11 ; inptr
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
%ifndef NO_ZERO_COLUMN_TEST_4X4_SSE2
|
|
shun-iwasawa |
82a8f5 |
mov eax, dword [DWBLOCK(1,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
or eax, dword [DWBLOCK(2,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
jnz short .columnDCT
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm0, XMMWORD [XMMBLOCK(1,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm1, XMMWORD [XMMBLOCK(2,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
por xmm0, XMMWORD [XMMBLOCK(3,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
por xmm1, XMMWORD [XMMBLOCK(5,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
por xmm0, XMMWORD [XMMBLOCK(6,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
por xmm1, XMMWORD [XMMBLOCK(7,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
por xmm0, xmm1
|
|
shun-iwasawa |
82a8f5 |
packsswb xmm0, xmm0
|
|
shun-iwasawa |
82a8f5 |
packsswb xmm0, xmm0
|
|
shun-iwasawa |
82a8f5 |
movd eax, xmm0
|
|
shun-iwasawa |
82a8f5 |
test rax, rax
|
|
shun-iwasawa |
82a8f5 |
jnz short .columnDCT
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- AC terms all zero
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm0, XMMWORD [XMMBLOCK(0,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
pmullw xmm0, XMMWORD [XMMBLOCK(0,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
psllw xmm0, PASS1_BITS
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, xmm0 ; xmm0=in0=(00 01 02 03 04 05 06 07)
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm0, xmm0 ; xmm0=(00 00 01 01 02 02 03 03)
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm3, xmm3 ; xmm3=(04 04 05 05 06 06 07 07)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
pshufd xmm1, xmm0, 0x50 ; xmm1=[col0 col1]=(00 00 00 00 01 01 01 01)
|
|
shun-iwasawa |
82a8f5 |
pshufd xmm0, xmm0, 0xFA ; xmm0=[col2 col3]=(02 02 02 02 03 03 03 03)
|
|
shun-iwasawa |
82a8f5 |
pshufd xmm6, xmm3, 0x50 ; xmm6=[col4 col5]=(04 04 04 04 05 05 05 05)
|
|
shun-iwasawa |
82a8f5 |
pshufd xmm3, xmm3, 0xFA ; xmm3=[col6 col7]=(06 06 06 06 07 07 07 07)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
jmp near .column_end
|
|
shun-iwasawa |
82a8f5 |
%endif
|
|
shun-iwasawa |
82a8f5 |
.columnDCT:
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Odd part
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm0, XMMWORD [XMMBLOCK(1,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm1, XMMWORD [XMMBLOCK(3,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
pmullw xmm0, XMMWORD [XMMBLOCK(1,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
|
|
shun-iwasawa |
82a8f5 |
pmullw xmm1, XMMWORD [XMMBLOCK(3,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm2, XMMWORD [XMMBLOCK(5,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, XMMWORD [XMMBLOCK(7,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
pmullw xmm2, XMMWORD [XMMBLOCK(5,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
|
|
shun-iwasawa |
82a8f5 |
pmullw xmm3, XMMWORD [XMMBLOCK(7,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm4, xmm0
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm5, xmm0
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm4, xmm1
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm5, xmm1
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm0, xmm4
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm1, xmm5
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm4, [rel PW_F256_F089] ; xmm4=(tmp2L)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm5, [rel PW_F256_F089] ; xmm5=(tmp2H)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm0, [rel PW_F106_MF217] ; xmm0=(tmp0L)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm1, [rel PW_F106_MF217] ; xmm1=(tmp0H)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm6, xmm2
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm7, xmm2
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm6, xmm3
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm7, xmm3
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm2, xmm6
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, xmm7
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm6, [rel PW_MF060_MF050] ; xmm6=(tmp2L)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm7, [rel PW_MF060_MF050] ; xmm7=(tmp2H)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm2, [rel PW_F145_MF021] ; xmm2=(tmp0L)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm3, [rel PW_F145_MF021] ; xmm3=(tmp0H)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm6, xmm4 ; xmm6=tmp2L
|
|
shun-iwasawa |
82a8f5 |
paddd xmm7, xmm5 ; xmm7=tmp2H
|
|
shun-iwasawa |
82a8f5 |
paddd xmm2, xmm0 ; xmm2=tmp0L
|
|
shun-iwasawa |
82a8f5 |
paddd xmm3, xmm1 ; xmm3=tmp0H
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa XMMWORD [wk(0)], xmm2 ; wk(0)=tmp0L
|
|
shun-iwasawa |
82a8f5 |
movdqa XMMWORD [wk(1)], xmm3 ; wk(1)=tmp0H
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Even part
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm4, XMMWORD [XMMBLOCK(0,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm5, XMMWORD [XMMBLOCK(2,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm0, XMMWORD [XMMBLOCK(6,0,rsi,SIZEOF_JCOEF)]
|
|
shun-iwasawa |
82a8f5 |
pmullw xmm4, XMMWORD [XMMBLOCK(0,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
|
|
shun-iwasawa |
82a8f5 |
pmullw xmm5, XMMWORD [XMMBLOCK(2,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
|
|
shun-iwasawa |
82a8f5 |
pmullw xmm0, XMMWORD [XMMBLOCK(6,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
pxor xmm1, xmm1
|
|
shun-iwasawa |
82a8f5 |
pxor xmm2, xmm2
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm1, xmm4 ; xmm1=tmp0L
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm2, xmm4 ; xmm2=tmp0H
|
|
shun-iwasawa |
82a8f5 |
psrad xmm1, (16-CONST_BITS-1) ; psrad xmm1,16 & pslld xmm1,CONST_BITS+1
|
|
shun-iwasawa |
82a8f5 |
psrad xmm2, (16-CONST_BITS-1) ; psrad xmm2,16 & pslld xmm2,CONST_BITS+1
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, xmm5 ; xmm5=in2=z2
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm5, xmm0 ; xmm0=in6=z3
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm3, xmm0
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm5, [rel PW_F184_MF076] ; xmm5=tmp2L
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm3, [rel PW_F184_MF076] ; xmm3=tmp2H
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm4, xmm1
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm0, xmm2
|
|
shun-iwasawa |
82a8f5 |
paddd xmm1, xmm5 ; xmm1=tmp10L
|
|
shun-iwasawa |
82a8f5 |
paddd xmm2, xmm3 ; xmm2=tmp10H
|
|
shun-iwasawa |
82a8f5 |
psubd xmm4, xmm5 ; xmm4=tmp12L
|
|
shun-iwasawa |
82a8f5 |
psubd xmm0, xmm3 ; xmm0=tmp12H
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Final output stage
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm5, xmm1
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, xmm2
|
|
shun-iwasawa |
82a8f5 |
paddd xmm1, xmm6 ; xmm1=data0L
|
|
shun-iwasawa |
82a8f5 |
paddd xmm2, xmm7 ; xmm2=data0H
|
|
shun-iwasawa |
82a8f5 |
psubd xmm5, xmm6 ; xmm5=data3L
|
|
shun-iwasawa |
82a8f5 |
psubd xmm3, xmm7 ; xmm3=data3H
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm6, [rel PD_DESCALE_P1_4] ; xmm6=[rel PD_DESCALE_P1_4]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm1, xmm6
|
|
shun-iwasawa |
82a8f5 |
paddd xmm2, xmm6
|
|
shun-iwasawa |
82a8f5 |
psrad xmm1, DESCALE_P1_4
|
|
shun-iwasawa |
82a8f5 |
psrad xmm2, DESCALE_P1_4
|
|
shun-iwasawa |
82a8f5 |
paddd xmm5, xmm6
|
|
shun-iwasawa |
82a8f5 |
paddd xmm3, xmm6
|
|
shun-iwasawa |
82a8f5 |
psrad xmm5, DESCALE_P1_4
|
|
shun-iwasawa |
82a8f5 |
psrad xmm3, DESCALE_P1_4
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm1, xmm2 ; xmm1=data0=(00 01 02 03 04 05 06 07)
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm5, xmm3 ; xmm5=data3=(30 31 32 33 34 35 36 37)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm7, XMMWORD [wk(0)] ; xmm7=tmp0L
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm6, XMMWORD [wk(1)] ; xmm6=tmp0H
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm2, xmm4
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, xmm0
|
|
shun-iwasawa |
82a8f5 |
paddd xmm4, xmm7 ; xmm4=data1L
|
|
shun-iwasawa |
82a8f5 |
paddd xmm0, xmm6 ; xmm0=data1H
|
|
shun-iwasawa |
82a8f5 |
psubd xmm2, xmm7 ; xmm2=data2L
|
|
shun-iwasawa |
82a8f5 |
psubd xmm3, xmm6 ; xmm3=data2H
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm7, [rel PD_DESCALE_P1_4] ; xmm7=[rel PD_DESCALE_P1_4]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm4, xmm7
|
|
shun-iwasawa |
82a8f5 |
paddd xmm0, xmm7
|
|
shun-iwasawa |
82a8f5 |
psrad xmm4, DESCALE_P1_4
|
|
shun-iwasawa |
82a8f5 |
psrad xmm0, DESCALE_P1_4
|
|
shun-iwasawa |
82a8f5 |
paddd xmm2, xmm7
|
|
shun-iwasawa |
82a8f5 |
paddd xmm3, xmm7
|
|
shun-iwasawa |
82a8f5 |
psrad xmm2, DESCALE_P1_4
|
|
shun-iwasawa |
82a8f5 |
psrad xmm3, DESCALE_P1_4
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm4, xmm0 ; xmm4=data1=(10 11 12 13 14 15 16 17)
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm2, xmm3 ; xmm2=data2=(20 21 22 23 24 25 26 27)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm6, xmm1 ; transpose coefficients(phase 1)
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm1, xmm4 ; xmm1=(00 10 01 11 02 12 03 13)
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm6, xmm4 ; xmm6=(04 14 05 15 06 16 07 17)
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm7, xmm2 ; transpose coefficients(phase 1)
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm2, xmm5 ; xmm2=(20 30 21 31 22 32 23 33)
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm7, xmm5 ; xmm7=(24 34 25 35 26 36 27 37)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm0, xmm1 ; transpose coefficients(phase 2)
|
|
shun-iwasawa |
82a8f5 |
punpckldq xmm1, xmm2 ; xmm1=[col0 col1]=(00 10 20 30 01 11 21 31)
|
|
shun-iwasawa |
82a8f5 |
punpckhdq xmm0, xmm2 ; xmm0=[col2 col3]=(02 12 22 32 03 13 23 33)
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, xmm6 ; transpose coefficients(phase 2)
|
|
shun-iwasawa |
82a8f5 |
punpckldq xmm6, xmm7 ; xmm6=[col4 col5]=(04 14 24 34 05 15 25 35)
|
|
shun-iwasawa |
82a8f5 |
punpckhdq xmm3, xmm7 ; xmm3=[col6 col7]=(06 16 26 36 07 17 27 37)
|
|
shun-iwasawa |
82a8f5 |
.column_end:
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Prefetch the next coefficient block
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 0*32]
|
|
shun-iwasawa |
82a8f5 |
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 1*32]
|
|
shun-iwasawa |
82a8f5 |
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 2*32]
|
|
shun-iwasawa |
82a8f5 |
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 3*32]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; ---- Pass 2: process rows, store into output array.
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
mov rax, [original_rbp]
|
|
shun-iwasawa |
82a8f5 |
mov rdi, r12 ; (JSAMPROW *)
|
|
shun-iwasawa |
82a8f5 |
mov eax, r13d
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Even part
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
pxor xmm4, xmm4
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm4, xmm1 ; xmm4=tmp0
|
|
shun-iwasawa |
82a8f5 |
psrad xmm4, (16-CONST_BITS-1) ; psrad xmm4,16 & pslld xmm4,CONST_BITS+1
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Odd part
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm1, xmm0
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm6, xmm3
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm5, xmm1
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm2, xmm6
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm1, [rel PW_F256_F089] ; xmm1=(tmp2)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm6, [rel PW_MF060_MF050] ; xmm6=(tmp2)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm5, [rel PW_F106_MF217] ; xmm5=(tmp0)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm2, [rel PW_F145_MF021] ; xmm2=(tmp0)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm6, xmm1 ; xmm6=tmp2
|
|
shun-iwasawa |
82a8f5 |
paddd xmm2, xmm5 ; xmm2=tmp0
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Even part
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm0, xmm3
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm0, [rel PW_F184_MF076] ; xmm0=tmp2
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm7, xmm4
|
|
shun-iwasawa |
82a8f5 |
paddd xmm4, xmm0 ; xmm4=tmp10
|
|
shun-iwasawa |
82a8f5 |
psubd xmm7, xmm0 ; xmm7=tmp12
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Final output stage
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm1, [rel PD_DESCALE_P2_4] ; xmm1=[rel PD_DESCALE_P2_4]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm5, xmm4
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, xmm7
|
|
shun-iwasawa |
82a8f5 |
paddd xmm4, xmm6 ; xmm4=data0=(00 10 20 30)
|
|
shun-iwasawa |
82a8f5 |
paddd xmm7, xmm2 ; xmm7=data1=(01 11 21 31)
|
|
shun-iwasawa |
82a8f5 |
psubd xmm5, xmm6 ; xmm5=data3=(03 13 23 33)
|
|
shun-iwasawa |
82a8f5 |
psubd xmm3, xmm2 ; xmm3=data2=(02 12 22 32)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm4, xmm1
|
|
shun-iwasawa |
82a8f5 |
paddd xmm7, xmm1
|
|
shun-iwasawa |
82a8f5 |
psrad xmm4, DESCALE_P2_4
|
|
shun-iwasawa |
82a8f5 |
psrad xmm7, DESCALE_P2_4
|
|
shun-iwasawa |
82a8f5 |
paddd xmm5, xmm1
|
|
shun-iwasawa |
82a8f5 |
paddd xmm3, xmm1
|
|
shun-iwasawa |
82a8f5 |
psrad xmm5, DESCALE_P2_4
|
|
shun-iwasawa |
82a8f5 |
psrad xmm3, DESCALE_P2_4
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm4, xmm3 ; xmm4=(00 10 20 30 02 12 22 32)
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm7, xmm5 ; xmm7=(01 11 21 31 03 13 23 33)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm0, xmm4 ; transpose coefficients(phase 1)
|
|
shun-iwasawa |
82a8f5 |
punpcklwd xmm4, xmm7 ; xmm4=(00 01 10 11 20 21 30 31)
|
|
shun-iwasawa |
82a8f5 |
punpckhwd xmm0, xmm7 ; xmm0=(02 03 12 13 22 23 32 33)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm6, xmm4 ; transpose coefficients(phase 2)
|
|
shun-iwasawa |
82a8f5 |
punpckldq xmm4, xmm0 ; xmm4=(00 01 02 03 10 11 12 13)
|
|
shun-iwasawa |
82a8f5 |
punpckhdq xmm6, xmm0 ; xmm6=(20 21 22 23 30 31 32 33)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
packsswb xmm4, xmm6 ; xmm4=(00 01 02 03 10 11 12 13 20 ..)
|
|
shun-iwasawa |
82a8f5 |
paddb xmm4, [rel PB_CENTERJSAMP]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
pshufd xmm2, xmm4, 0x39 ; xmm2=(10 11 12 13 20 21 22 23 30 ..)
|
|
shun-iwasawa |
82a8f5 |
pshufd xmm1, xmm4, 0x4E ; xmm1=(20 21 22 23 30 31 32 33 00 ..)
|
|
shun-iwasawa |
82a8f5 |
pshufd xmm3, xmm4, 0x93 ; xmm3=(30 31 32 33 00 01 02 03 10 ..)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
mov rdx, JSAMPROW [rdi+0*SIZEOF_JSAMPROW]
|
|
shun-iwasawa |
82a8f5 |
mov rsi, JSAMPROW [rdi+1*SIZEOF_JSAMPROW]
|
|
shun-iwasawa |
82a8f5 |
movd XMM_DWORD [rdx+rax*SIZEOF_JSAMPLE], xmm4
|
|
shun-iwasawa |
82a8f5 |
movd XMM_DWORD [rsi+rax*SIZEOF_JSAMPLE], xmm2
|
|
shun-iwasawa |
82a8f5 |
mov rdx, JSAMPROW [rdi+2*SIZEOF_JSAMPROW]
|
|
shun-iwasawa |
82a8f5 |
mov rsi, JSAMPROW [rdi+3*SIZEOF_JSAMPROW]
|
|
shun-iwasawa |
82a8f5 |
movd XMM_DWORD [rdx+rax*SIZEOF_JSAMPLE], xmm1
|
|
shun-iwasawa |
82a8f5 |
movd XMM_DWORD [rsi+rax*SIZEOF_JSAMPLE], xmm3
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
uncollect_args 4
|
|
shun-iwasawa |
82a8f5 |
mov rsp, rbp ; rsp <- aligned rbp
|
|
shun-iwasawa |
82a8f5 |
pop rsp ; rsp <- original rbp
|
|
shun-iwasawa |
82a8f5 |
pop rbp
|
|
shun-iwasawa |
82a8f5 |
ret
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; --------------------------------------------------------------------------
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; Perform dequantization and inverse DCT on one block of coefficients,
|
|
shun-iwasawa |
82a8f5 |
; producing a reduced-size 2x2 output block.
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
; GLOBAL(void)
|
|
shun-iwasawa |
82a8f5 |
; jsimd_idct_2x2_sse2(void *dct_table, JCOEFPTR coef_block,
|
|
shun-iwasawa |
82a8f5 |
; JSAMPARRAY output_buf, JDIMENSION output_col)
|
|
shun-iwasawa |
82a8f5 |
;
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; r10 = void *dct_table
|
|
shun-iwasawa |
82a8f5 |
; r11 = JCOEFPTR coef_block
|
|
shun-iwasawa |
82a8f5 |
; r12 = JSAMPARRAY output_buf
|
|
shun-iwasawa |
82a8f5 |
; r13d = JDIMENSION output_col
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
align 32
|
|
shun-iwasawa |
82a8f5 |
GLOBAL_FUNCTION(jsimd_idct_2x2_sse2)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
EXTN(jsimd_idct_2x2_sse2):
|
|
shun-iwasawa |
82a8f5 |
push rbp
|
|
shun-iwasawa |
82a8f5 |
mov rax, rsp
|
|
shun-iwasawa |
82a8f5 |
mov rbp, rsp
|
|
shun-iwasawa |
82a8f5 |
collect_args 4
|
|
shun-iwasawa |
82a8f5 |
push rbx
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; ---- Pass 1: process columns from input.
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shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
mov rdx, r10 ; quantptr
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shun-iwasawa |
82a8f5 |
mov rsi, r11 ; inptr
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shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; | input: | result: |
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shun-iwasawa |
82a8f5 |
; | 00 01 ** 03 ** 05 ** 07 | |
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shun-iwasawa |
82a8f5 |
; | 10 11 ** 13 ** 15 ** 17 | |
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|
shun-iwasawa |
82a8f5 |
; | ** ** ** ** ** ** ** ** | |
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shun-iwasawa |
82a8f5 |
; | 30 31 ** 33 ** 35 ** 37 | A0 A1 A3 A5 A7 |
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|
shun-iwasawa |
82a8f5 |
; | ** ** ** ** ** ** ** ** | B0 B1 B3 B5 B7 |
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|
shun-iwasawa |
82a8f5 |
; | 50 51 ** 53 ** 55 ** 57 | |
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|
shun-iwasawa |
82a8f5 |
; | ** ** ** ** ** ** ** ** | |
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shun-iwasawa |
82a8f5 |
; | 70 71 ** 73 ** 75 ** 77 | |
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|
shun-iwasawa |
82a8f5 |
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|
shun-iwasawa |
82a8f5 |
; -- Odd part
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|
shun-iwasawa |
82a8f5 |
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|
shun-iwasawa |
82a8f5 |
movdqa xmm0, XMMWORD [XMMBLOCK(1,0,rsi,SIZEOF_JCOEF)]
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|
shun-iwasawa |
82a8f5 |
movdqa xmm1, XMMWORD [XMMBLOCK(3,0,rsi,SIZEOF_JCOEF)]
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|
shun-iwasawa |
82a8f5 |
pmullw xmm0, XMMWORD [XMMBLOCK(1,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
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|
shun-iwasawa |
82a8f5 |
pmullw xmm1, XMMWORD [XMMBLOCK(3,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
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shun-iwasawa |
82a8f5 |
movdqa xmm2, XMMWORD [XMMBLOCK(5,0,rsi,SIZEOF_JCOEF)]
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shun-iwasawa |
82a8f5 |
movdqa xmm3, XMMWORD [XMMBLOCK(7,0,rsi,SIZEOF_JCOEF)]
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|
shun-iwasawa |
82a8f5 |
pmullw xmm2, XMMWORD [XMMBLOCK(5,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
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|
shun-iwasawa |
82a8f5 |
pmullw xmm3, XMMWORD [XMMBLOCK(7,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
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shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; xmm0=(10 11 ** 13 ** 15 ** 17), xmm1=(30 31 ** 33 ** 35 ** 37)
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|
shun-iwasawa |
82a8f5 |
; xmm2=(50 51 ** 53 ** 55 ** 57), xmm3=(70 71 ** 73 ** 75 ** 77)
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|
shun-iwasawa |
82a8f5 |
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shun-iwasawa |
82a8f5 |
pcmpeqd xmm7, xmm7
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shun-iwasawa |
82a8f5 |
pslld xmm7, WORD_BIT ; xmm7={0x0000 0xFFFF 0x0000 0xFFFF ..}
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|
shun-iwasawa |
82a8f5 |
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|
shun-iwasawa |
82a8f5 |
movdqa xmm4, xmm0 ; xmm4=(10 11 ** 13 ** 15 ** 17)
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shun-iwasawa |
82a8f5 |
movdqa xmm5, xmm2 ; xmm5=(50 51 ** 53 ** 55 ** 57)
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|
shun-iwasawa |
82a8f5 |
punpcklwd xmm4, xmm1 ; xmm4=(10 30 11 31 ** ** 13 33)
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|
shun-iwasawa |
82a8f5 |
punpcklwd xmm5, xmm3 ; xmm5=(50 70 51 71 ** ** 53 73)
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|
shun-iwasawa |
82a8f5 |
pmaddwd xmm4, [rel PW_F362_MF127]
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|
shun-iwasawa |
82a8f5 |
pmaddwd xmm5, [rel PW_F085_MF072]
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
psrld xmm0, WORD_BIT ; xmm0=(11 -- 13 -- 15 -- 17 --)
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|
shun-iwasawa |
82a8f5 |
pand xmm1, xmm7 ; xmm1=(-- 31 -- 33 -- 35 -- 37)
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|
shun-iwasawa |
82a8f5 |
psrld xmm2, WORD_BIT ; xmm2=(51 -- 53 -- 55 -- 57 --)
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|
shun-iwasawa |
82a8f5 |
pand xmm3, xmm7 ; xmm3=(-- 71 -- 73 -- 75 -- 77)
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|
shun-iwasawa |
82a8f5 |
por xmm0, xmm1 ; xmm0=(11 31 13 33 15 35 17 37)
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|
shun-iwasawa |
82a8f5 |
por xmm2, xmm3 ; xmm2=(51 71 53 73 55 75 57 77)
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|
shun-iwasawa |
82a8f5 |
pmaddwd xmm0, [rel PW_F362_MF127]
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|
shun-iwasawa |
82a8f5 |
pmaddwd xmm2, [rel PW_F085_MF072]
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm4, xmm5 ; xmm4=tmp0[col0 col1 **** col3]
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|
shun-iwasawa |
82a8f5 |
paddd xmm0, xmm2 ; xmm0=tmp0[col1 col3 col5 col7]
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Even part
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm6, XMMWORD [XMMBLOCK(0,0,rsi,SIZEOF_JCOEF)]
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|
shun-iwasawa |
82a8f5 |
pmullw xmm6, XMMWORD [XMMBLOCK(0,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; xmm6=(00 01 ** 03 ** 05 ** 07)
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm1, xmm6 ; xmm1=(00 01 ** 03 ** 05 ** 07)
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|
shun-iwasawa |
82a8f5 |
pslld xmm6, WORD_BIT ; xmm6=(-- 00 -- ** -- ** -- **)
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|
shun-iwasawa |
82a8f5 |
pand xmm1, xmm7 ; xmm1=(-- 01 -- 03 -- 05 -- 07)
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|
shun-iwasawa |
82a8f5 |
psrad xmm6, (WORD_BIT-CONST_BITS-2) ; xmm6=tmp10[col0 **** **** ****]
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|
shun-iwasawa |
82a8f5 |
psrad xmm1, (WORD_BIT-CONST_BITS-2) ; xmm1=tmp10[col1 col3 col5 col7]
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Final output stage
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm3, xmm6
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|
shun-iwasawa |
82a8f5 |
movdqa xmm5, xmm1
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shun-iwasawa |
82a8f5 |
paddd xmm6, xmm4 ; xmm6=data0[col0 **** **** ****]=(A0 ** ** **)
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shun-iwasawa |
82a8f5 |
paddd xmm1, xmm0 ; xmm1=data0[col1 col3 col5 col7]=(A1 A3 A5 A7)
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shun-iwasawa |
82a8f5 |
psubd xmm3, xmm4 ; xmm3=data1[col0 **** **** ****]=(B0 ** ** **)
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shun-iwasawa |
82a8f5 |
psubd xmm5, xmm0 ; xmm5=data1[col1 col3 col5 col7]=(B1 B3 B5 B7)
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm2, [rel PD_DESCALE_P1_2] ; xmm2=[rel PD_DESCALE_P1_2]
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shun-iwasawa |
82a8f5 |
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shun-iwasawa |
82a8f5 |
punpckldq xmm6, xmm3 ; xmm6=(A0 B0 ** **)
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm7, xmm1
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|
shun-iwasawa |
82a8f5 |
punpcklqdq xmm1, xmm5 ; xmm1=(A1 A3 B1 B3)
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|
shun-iwasawa |
82a8f5 |
punpckhqdq xmm7, xmm5 ; xmm7=(A5 A7 B5 B7)
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|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm6, xmm2
|
|
shun-iwasawa |
82a8f5 |
psrad xmm6, DESCALE_P1_2
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm1, xmm2
|
|
shun-iwasawa |
82a8f5 |
paddd xmm7, xmm2
|
|
shun-iwasawa |
82a8f5 |
psrad xmm1, DESCALE_P1_2
|
|
shun-iwasawa |
82a8f5 |
psrad xmm7, DESCALE_P1_2
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Prefetch the next coefficient block
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 0*32]
|
|
shun-iwasawa |
82a8f5 |
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 1*32]
|
|
shun-iwasawa |
82a8f5 |
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 2*32]
|
|
shun-iwasawa |
82a8f5 |
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 3*32]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; ---- Pass 2: process rows, store into output array.
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
mov rdi, r12 ; (JSAMPROW *)
|
|
shun-iwasawa |
82a8f5 |
mov eax, r13d
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; | input:| result:|
|
|
shun-iwasawa |
82a8f5 |
; | A0 B0 | |
|
|
shun-iwasawa |
82a8f5 |
; | A1 B1 | C0 C1 |
|
|
shun-iwasawa |
82a8f5 |
; | A3 B3 | D0 D1 |
|
|
shun-iwasawa |
82a8f5 |
; | A5 B5 | |
|
|
shun-iwasawa |
82a8f5 |
; | A7 B7 | |
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Odd part
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm1, xmm1 ; xmm1=(A1 A3 B1 B3 A1 A3 B1 B3)
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm7, xmm7 ; xmm7=(A5 A7 B5 B7 A5 A7 B5 B7)
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm1, [rel PW_F362_MF127]
|
|
shun-iwasawa |
82a8f5 |
pmaddwd xmm7, [rel PW_F085_MF072]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm1, xmm7 ; xmm1=tmp0[row0 row1 row0 row1]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Even part
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
pslld xmm6, (CONST_BITS+2) ; xmm6=tmp10[row0 row1 **** ****]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; -- Final output stage
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
movdqa xmm4, xmm6
|
|
shun-iwasawa |
82a8f5 |
paddd xmm6, xmm1 ; xmm6=data0[row0 row1 **** ****]=(C0 C1 ** **)
|
|
shun-iwasawa |
82a8f5 |
psubd xmm4, xmm1 ; xmm4=data1[row0 row1 **** ****]=(D0 D1 ** **)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
punpckldq xmm6, xmm4 ; xmm6=(C0 D0 C1 D1)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
paddd xmm6, [rel PD_DESCALE_P2_2]
|
|
shun-iwasawa |
82a8f5 |
psrad xmm6, DESCALE_P2_2
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
packssdw xmm6, xmm6 ; xmm6=(C0 D0 C1 D1 C0 D0 C1 D1)
|
|
shun-iwasawa |
82a8f5 |
packsswb xmm6, xmm6 ; xmm6=(C0 D0 C1 D1 C0 D0 C1 D1 ..)
|
|
shun-iwasawa |
82a8f5 |
paddb xmm6, [rel PB_CENTERJSAMP]
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
pextrw ebx, xmm6, 0x00 ; ebx=(C0 D0 -- --)
|
|
shun-iwasawa |
82a8f5 |
pextrw ecx, xmm6, 0x01 ; ecx=(C1 D1 -- --)
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
mov rdx, JSAMPROW [rdi+0*SIZEOF_JSAMPROW]
|
|
shun-iwasawa |
82a8f5 |
mov rsi, JSAMPROW [rdi+1*SIZEOF_JSAMPROW]
|
|
shun-iwasawa |
82a8f5 |
mov word [rdx+rax*SIZEOF_JSAMPLE], bx
|
|
shun-iwasawa |
82a8f5 |
mov word [rsi+rax*SIZEOF_JSAMPLE], cx
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
pop rbx
|
|
shun-iwasawa |
82a8f5 |
uncollect_args 4
|
|
shun-iwasawa |
82a8f5 |
pop rbp
|
|
shun-iwasawa |
82a8f5 |
ret
|
|
shun-iwasawa |
82a8f5 |
|
|
shun-iwasawa |
82a8f5 |
; For some reason, the OS X linker does not honor the request to align the
|
|
shun-iwasawa |
82a8f5 |
; segment unless we do this.
|
|
shun-iwasawa |
82a8f5 |
align 32
|