Blame thirdparty/openblas/xianyi-OpenBLAS-e6e87a2/kernel/power/zaxpy_ppc440.S

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/*********************************************************************/
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/* Copyright 2009, 2010 The University of Texas at Austin.           */
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/* All rights reserved.                                              */
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/*                                                                   */
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/* Redistribution and use in source and binary forms, with or        */
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/* without modification, are permitted provided that the following   */
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/* conditions are met:                                               */
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/*                                                                   */
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/*   1. Redistributions of source code must retain the above         */
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/*      copyright notice, this list of conditions and the following  */
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/*      disclaimer.                                                  */
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/*                                                                   */
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/*   2. Redistributions in binary form must reproduce the above      */
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/*      copyright notice, this list of conditions and the following  */
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/*      disclaimer in the documentation and/or other materials       */
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/*      provided with the distribution.                              */
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/*                                                                   */
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/*    THIS  SOFTWARE IS PROVIDED  BY THE  UNIVERSITY OF  TEXAS AT    */
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/*    AUSTIN  ``AS IS''  AND ANY  EXPRESS OR  IMPLIED WARRANTIES,    */
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/*    INCLUDING, BUT  NOT LIMITED  TO, THE IMPLIED  WARRANTIES OF    */
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/*    MERCHANTABILITY  AND FITNESS FOR  A PARTICULAR  PURPOSE ARE    */
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/*    DISCLAIMED.  IN  NO EVENT SHALL THE UNIVERSITY  OF TEXAS AT    */
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/*    AUSTIN OR CONTRIBUTORS BE  LIABLE FOR ANY DIRECT, INDIRECT,    */
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/*    INCIDENTAL,  SPECIAL, EXEMPLARY,  OR  CONSEQUENTIAL DAMAGES    */
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/*    (INCLUDING, BUT  NOT LIMITED TO,  PROCUREMENT OF SUBSTITUTE    */
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/*    GOODS  OR  SERVICES; LOSS  OF  USE,  DATA,  OR PROFITS;  OR    */
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/*    BUSINESS INTERRUPTION) HOWEVER CAUSED  AND ON ANY THEORY OF    */
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/*    LIABILITY, WHETHER  IN CONTRACT, STRICT  LIABILITY, OR TORT    */
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/*    (INCLUDING NEGLIGENCE OR OTHERWISE)  ARISING IN ANY WAY OUT    */
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/*    OF  THE  USE OF  THIS  SOFTWARE,  EVEN  IF ADVISED  OF  THE    */
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/*    POSSIBILITY OF SUCH DAMAGE.                                    */
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/*                                                                   */
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/* The views and conclusions contained in the software and           */
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/* documentation are those of the authors and should not be          */
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/* interpreted as representing official policies, either expressed   */
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/* or implied, of The University of Texas at Austin.                 */
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/*********************************************************************/
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#define ASSEMBLER
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#include "common.h"
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#ifdef linux
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#ifndef __64BIT__
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#define N	r3
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#define X	r6
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#define INCX	r7
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#define Y	r8
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#define INCY	r9
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#define	YY	r4
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#define PRE	r5
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#else
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#define N	r3
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#define X	r8
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#define INCX	r9	
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#define Y	r5
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#define INCY	r4
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#define	YY	r6
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#define PRE	r7
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#endif
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#endif
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#if defined(_AIX) || defined(__APPLE__)
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#if !defined(__64BIT__) && defined(DOUBLE)
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#define N	r3
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#define X	r10
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#define INCX	r4
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#define Y	r5
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#define INCY	r6
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#define	YY	r7
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#define PRE	r8
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#else
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#define N	r3
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#define X	r8
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#define INCX	r9
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#define Y	r10
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#define INCY	r4
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#define	YY	r5
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#define PRE	r6
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#endif
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#endif
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#define ALPHA_R	f24
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#define ALPHA_I	f25
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#ifndef CONJ
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#define ADD1	FNMSUB
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#define ADD2	FMADD
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#else
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#define ADD1	FMADD
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#define ADD2	FNMSUB
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#endif
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#define STACKSIZE 96
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	PROLOGUE
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	PROFCODE
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	subi	SP, SP, STACKSIZE
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	stfd	f14,    0(SP)
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	stfd	f15,    8(SP)
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	stfd	f16,   16(SP)
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	stfd	f17,   24(SP)
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	stfd	f18,   32(SP)
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	stfd	f19,   40(SP)
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	stfd	f20,   48(SP)
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	stfd	f21,   56(SP)
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	stfd	f22,   64(SP)
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	stfd	f23,   72(SP)
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	stfd	f24,   80(SP)
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	stfd	f25,   88(SP)
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#if defined(linux) && defined(__64BIT__)
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        ld	INCY, 112 + STACKSIZE(SP)
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#endif
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#if defined(_AIX) || defined(__APPLE__)
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#ifdef __64BIT__
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	ld	INCY,   112 + STACKSIZE(SP)
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#else
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#ifdef DOUBLE
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	lwz	INCX,    56 + STACKSIZE(SP)
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	lwz	Y,       60 + STACKSIZE(SP)
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	lwz	INCY,    64 + STACKSIZE(SP)
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#else
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	lwz	INCY,    56 + STACKSIZE(SP)
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#endif
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#endif
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#endif
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	fmr	ALPHA_R, f1
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	slwi	INCX, INCX, ZBASE_SHIFT
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	fmr	ALPHA_I, f2
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	slwi	INCY, INCY, ZBASE_SHIFT
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	subi	INCX, INCX, SIZE
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	subi	INCY, INCY, SIZE
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	li	PRE, 2 * 16 * SIZE
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	cmpwi	cr0, N, 0
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	ble-	LL(999)
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	sub	X, X, INCX
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	sub	Y, Y, INCY
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	mr	YY, Y
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	srawi.	r0, N, 3
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	mtspr	CTR,  r0
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	ble-	LL(150)
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	.align 4
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	LFDUX	f0,    X, INCX
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	LFDU	f1,    1 * SIZE(X)
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	LFDUX	f2,    X, INCX
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	LFDU	f3,    1 * SIZE(X)
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	LFDUX	f8,    Y, INCY
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	LFDU	f9,    1 * SIZE(Y)
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	LFDUX	f10,   Y, INCY
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	LFDU	f11,   1 * SIZE(Y)
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	LFDUX	f4,    X, INCX
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	LFDU	f5,    1 * SIZE(X)
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	LFDUX	f6,    X, INCX
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	LFDU	f7,    1 * SIZE(X)
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	LFDUX	f12,   Y, INCY
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	LFDU	f13,   1 * SIZE(Y)
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	LFDUX	f14,   Y, INCY
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	LFDU	f15,   1 * SIZE(Y)
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	bdz	LL(120)
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	.align 4
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LL(110):
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	FMADD	f16,  ALPHA_R, f0, f8
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	LFDUX	f8,    Y, INCY
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	FMADD	f17,  ALPHA_I, f0, f9
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	LFDU	f9,    1 * SIZE(Y)
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	FMADD	f18,  ALPHA_R, f2, f10
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	LFDUX	f10,   Y, INCY
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	FMADD	f19,  ALPHA_I, f2, f11
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	LFDU	f11,   1 * SIZE(Y)
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#ifdef PPCG4
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	dcbt	X, PRE
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#endif
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	ADD1	f16,  ALPHA_I, f1, f16
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	LFDUX	f0,    X, INCX
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	ADD2	f17,  ALPHA_R, f1, f17
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	LFDU	f1,    1 * SIZE(X)
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	ADD1	f18,  ALPHA_I, f3, f18
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	LFDUX	f2,    X, INCX
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	ADD2	f19,  ALPHA_R, f3, f19
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	LFDU	f3,    1 * SIZE(X)
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#ifdef PPCG4
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	dcbtst	Y, PRE
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#endif
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	FMADD	f20,  ALPHA_R, f4, f12
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	LFDUX	f12,   Y, INCY
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	FMADD	f21,  ALPHA_I, f4, f13
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	LFDU	f13,   1 * SIZE(Y)
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	FMADD	f22,  ALPHA_R, f6, f14
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	LFDUX	f14,   Y, INCY
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	FMADD	f23,  ALPHA_I, f6, f15
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	LFDU	f15,   1 * SIZE(Y)
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#if defined(PPCG4) && defined(DOUBLE)
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	dcbt	X, PRE
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#endif
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	ADD1	f20,  ALPHA_I, f5, f20
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	LFDUX	f4,    X, INCX
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	ADD2	f21,  ALPHA_R, f5, f21
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	LFDU	f5,    1 * SIZE(X)
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	ADD1	f22,  ALPHA_I, f7, f22
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	LFDUX	f6,    X, INCX
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	ADD2	f23,  ALPHA_R, f7, f23
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	LFDU	f7,    1 * SIZE(X)
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#if defined(PPCG4) && defined(DOUBLE)
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	dcbtst	Y, PRE
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#endif
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	STFDUX	f16,   YY, INCY
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	STFDU	f17,   1 * SIZE(YY)
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	STFDUX	f18,   YY, INCY
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	STFDU	f19,   1 * SIZE(YY)
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	FMADD	f16,  ALPHA_R, f0, f8
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	LFDUX	f8,    Y, INCY
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	FMADD	f17,  ALPHA_I, f0, f9
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	LFDU	f9,    1 * SIZE(Y)
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	FMADD	f18,  ALPHA_R, f2, f10
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	LFDUX	f10,   Y, INCY
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	FMADD	f19,  ALPHA_I, f2, f11
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	LFDU	f11,   1 * SIZE(Y)
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#ifdef PPCG4
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	dcbt	X, PRE
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#endif
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	ADD1	f16,  ALPHA_I, f1, f16
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	LFDUX	f0,    X, INCX
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	ADD2	f17,  ALPHA_R, f1, f17
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	LFDU	f1,    1 * SIZE(X)
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	ADD1	f18,  ALPHA_I, f3, f18
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	LFDUX	f2,    X, INCX
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	ADD2	f19,  ALPHA_R, f3, f19
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	LFDU	f3,    1 * SIZE(X)
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#ifdef PPCG4
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	dcbtst	Y, PRE
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#endif
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	STFDUX	f20,   YY, INCY
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	STFDU	f21,   1 * SIZE(YY)
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	STFDUX	f22,   YY, INCY
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	STFDU	f23,   1 * SIZE(YY)
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	FMADD	f20,  ALPHA_R, f4, f12
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	LFDUX	f12,   Y, INCY
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	FMADD	f21,  ALPHA_I, f4, f13
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	LFDU	f13,   1 * SIZE(Y)
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	FMADD	f22,  ALPHA_R, f6, f14
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	LFDUX	f14,   Y, INCY
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	FMADD	f23,  ALPHA_I, f6, f15
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	LFDU	f15,   1 * SIZE(Y)
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#if defined(PPCG4) && defined(DOUBLE)
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	dcbt	X, PRE
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#endif
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	ADD1	f20,  ALPHA_I, f5, f20
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	LFDUX	f4,    X, INCX
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	ADD2	f21,  ALPHA_R, f5, f21
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	LFDU	f5,    1 * SIZE(X)
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	ADD1	f22,  ALPHA_I, f7, f22
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	LFDUX	f6,    X, INCX
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	ADD2	f23,  ALPHA_R, f7, f23
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	LFDU	f7,    1 * SIZE(X)
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#if defined(PPCG4) && defined(DOUBLE)
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	dcbtst	Y, PRE
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#endif
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	STFDUX	f16,   YY, INCY
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	STFDU	f17,   1 * SIZE(YY)
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	STFDUX	f18,   YY, INCY
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	STFDU	f19,   1 * SIZE(YY)
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	STFDUX	f20,   YY, INCY
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	STFDU	f21,   1 * SIZE(YY)
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	STFDUX	f22,   YY, INCY
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	STFDU	f23,   1 * SIZE(YY)
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	bdnz	LL(110)
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	.align 4
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LL(120):
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	FMADD	f16,  ALPHA_R, f0, f8
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	LFDUX	f8,    Y, INCY
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	FMADD	f17,  ALPHA_I, f0, f9
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	LFDU	f9,    1 * SIZE(Y)
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	FMADD	f18,  ALPHA_R, f2, f10
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	LFDUX	f10,   Y, INCY
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	FMADD	f19,  ALPHA_I, f2, f11
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	LFDU	f11,   1 * SIZE(Y)
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	ADD1	f16,  ALPHA_I, f1, f16
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	LFDUX	f0,    X, INCX
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	ADD2	f17,  ALPHA_R, f1, f17
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	LFDU	f1,    1 * SIZE(X)
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	ADD1	f18,  ALPHA_I, f3, f18
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	LFDUX	f2,    X, INCX
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	ADD2	f19,  ALPHA_R, f3, f19
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	LFDU	f3,    1 * SIZE(X)
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	FMADD	f20,  ALPHA_R, f4, f12
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	LFDUX	f12,   Y, INCY
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	FMADD	f21,  ALPHA_I, f4, f13
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	LFDU	f13,   1 * SIZE(Y)
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	FMADD	f22,  ALPHA_R, f6, f14
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	LFDUX	f14,   Y, INCY
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	FMADD	f23,  ALPHA_I, f6, f15
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	LFDU	f15,   1 * SIZE(Y)
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	ADD1	f20,  ALPHA_I, f5, f20
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	LFDUX	f4,    X, INCX
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	ADD2	f21,  ALPHA_R, f5, f21
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	LFDU	f5,    1 * SIZE(X)
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	ADD1	f22,  ALPHA_I, f7, f22
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	LFDUX	f6,    X, INCX
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	ADD2	f23,  ALPHA_R, f7, f23
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	LFDU	f7,    1 * SIZE(X)
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	STFDUX	f16,   YY, INCY
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	FMADD	f16,  ALPHA_R, f0, f8
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	STFDU	f17,   1 * SIZE(YY)
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	FMADD	f17,  ALPHA_I, f0, f9
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	STFDUX	f18,   YY, INCY
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	FMADD	f18,  ALPHA_R, f2, f10
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	STFDU	f19,   1 * SIZE(YY)
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	FMADD	f19,  ALPHA_I, f2, f11
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	ADD1	f16,  ALPHA_I, f1, f16
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	ADD2	f17,  ALPHA_R, f1, f17
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	ADD1	f18,  ALPHA_I, f3, f18
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	ADD2	f19,  ALPHA_R, f3, f19
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	STFDUX	f20,   YY, INCY
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	FMADD	f20,  ALPHA_R, f4, f12
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	STFDU	f21,   1 * SIZE(YY)
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	FMADD	f21,  ALPHA_I, f4, f13
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	STFDUX	f22,   YY, INCY
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	FMADD	f22,  ALPHA_R, f6, f14
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	STFDU	f23,   1 * SIZE(YY)
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	FMADD	f23,  ALPHA_I, f6, f15
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	ADD1	f20,  ALPHA_I, f5, f20
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	STFDUX	f16,   YY, INCY
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	ADD2	f21,  ALPHA_R, f5, f21
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	STFDU	f17,   1 * SIZE(YY)
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	ADD1	f22,  ALPHA_I, f7, f22
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	STFDUX	f18,   YY, INCY
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	ADD2	f23,  ALPHA_R, f7, f23
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	STFDU	f19,   1 * SIZE(YY)
kusano 2b45e8
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	STFDUX	f20,   YY, INCY
kusano 2b45e8
	STFDU	f21,   1 * SIZE(YY)
kusano 2b45e8
	STFDUX	f22,   YY, INCY
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	STFDU	f23,   1 * SIZE(YY)
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	.align 4
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LL(150):
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	andi.	r0,  N, 7
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	mtspr	CTR, r0
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	ble	LL(999)
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	.align 4
kusano 2b45e8
kusano 2b45e8
LL(160):
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	LFDUX	f0,   X, INCX
kusano 2b45e8
	LFDU	f1,   1 * SIZE(X)
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	LFDUX	f8,   Y, INCY
kusano 2b45e8
	LFDU	f9,   1 * SIZE(Y)
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	FMADD	f16,  ALPHA_R, f0, f8
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	FMADD	f17,  ALPHA_I, f0, f9
kusano 2b45e8
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	ADD1	f16,  ALPHA_I, f1, f16
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	ADD2	f17,  ALPHA_R, f1, f17
kusano 2b45e8
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	STFDUX	f16,  YY, INCY
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	STFDU	f17,  1 * SIZE(YY)
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	bdnz	LL(160)
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	.align 4
kusano 2b45e8
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LL(999):
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	lfd	f14,    0(SP)
kusano 2b45e8
	lfd	f15,    8(SP)
kusano 2b45e8
	lfd	f16,   16(SP)
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	lfd	f17,   24(SP)
kusano 2b45e8
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	lfd	f18,   32(SP)
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	lfd	f19,   40(SP)
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	lfd	f20,   48(SP)
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	lfd	f21,   56(SP)
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	lfd	f22,   64(SP)
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	lfd	f23,   72(SP)
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	lfd	f24,   80(SP)
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	lfd	f25,   88(SP)
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	addi	SP, SP, STACKSIZE
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	li	r0, 0
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	blr
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	EPILOGUE