Blame thirdparty/openblas/xianyi-OpenBLAS-e6e87a2/kernel/x86_64/zgemm_beta.S

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/*********************************************************************/
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/* Copyright 2009, 2010 The University of Texas at Austin.           */
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/* All rights reserved.                                              */
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/*                                                                   */
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/* Redistribution and use in source and binary forms, with or        */
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/* without modification, are permitted provided that the following   */
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/* conditions are met:                                               */
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/*                                                                   */
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/*   1. Redistributions of source code must retain the above         */
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/*      copyright notice, this list of conditions and the following  */
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/*      disclaimer.                                                  */
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/*                                                                   */
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/*   2. Redistributions in binary form must reproduce the above      */
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/*      copyright notice, this list of conditions and the following  */
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/*      disclaimer in the documentation and/or other materials       */
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/*      provided with the distribution.                              */
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/*                                                                   */
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/*    THIS  SOFTWARE IS PROVIDED  BY THE  UNIVERSITY OF  TEXAS AT    */
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/*    AUSTIN  ``AS IS''  AND ANY  EXPRESS OR  IMPLIED WARRANTIES,    */
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/*    INCLUDING, BUT  NOT LIMITED  TO, THE IMPLIED  WARRANTIES OF    */
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/*    MERCHANTABILITY  AND FITNESS FOR  A PARTICULAR  PURPOSE ARE    */
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/*    DISCLAIMED.  IN  NO EVENT SHALL THE UNIVERSITY  OF TEXAS AT    */
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/*    AUSTIN OR CONTRIBUTORS BE  LIABLE FOR ANY DIRECT, INDIRECT,    */
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/*    INCIDENTAL,  SPECIAL, EXEMPLARY,  OR  CONSEQUENTIAL DAMAGES    */
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/*    (INCLUDING, BUT  NOT LIMITED TO,  PROCUREMENT OF SUBSTITUTE    */
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/*    GOODS  OR  SERVICES; LOSS  OF  USE,  DATA,  OR PROFITS;  OR    */
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/*    BUSINESS INTERRUPTION) HOWEVER CAUSED  AND ON ANY THEORY OF    */
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/*    LIABILITY, WHETHER  IN CONTRACT, STRICT  LIABILITY, OR TORT    */
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/*    (INCLUDING NEGLIGENCE OR OTHERWISE)  ARISING IN ANY WAY OUT    */
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/*    OF  THE  USE OF  THIS  SOFTWARE,  EVEN  IF ADVISED  OF  THE    */
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/*    POSSIBILITY OF SUCH DAMAGE.                                    */
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/*                                                                   */
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/* The views and conclusions contained in the software and           */
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/* documentation are those of the authors and should not be          */
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/* interpreted as representing official policies, either expressed   */
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/* or implied, of The University of Texas at Austin.                 */
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/*********************************************************************/
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#define ASSEMBLER
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#include "common.h"
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#ifndef WINDOWS_ABI
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#define M	ARG1
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#define N	ARG2
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#define C	ARG3
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#define LDC	ARG4
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#define C1	ARG5
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#define STACK_C	  16(%rsp)
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#define STACK_LDC 24(%rsp)
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#else
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#define STACKSIZE 256
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#define M	ARG1
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#define N	ARG2
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#define C	ARG3
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#define LDC	ARG4
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#define C1	%r10
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#define STACK_ALPHA_I	40 + STACKSIZE(%rsp)
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#define STACK_C		80 + STACKSIZE(%rsp)
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#define STACK_LDC	88 + STACKSIZE(%rsp)
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#endif
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#define I	%rax
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	PROLOGUE
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	PROFCODE
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#ifdef WINDOWS_ABI
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	subq	$STACKSIZE, %rsp
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	movups	%xmm6,    0(%rsp)
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	movups	%xmm7,   16(%rsp)
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	movups	%xmm8,   32(%rsp)
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	movups	%xmm9,   48(%rsp)
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	movups	%xmm10,  64(%rsp)
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	movups	%xmm11,  80(%rsp)
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	movups	%xmm12,  96(%rsp)
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	movups	%xmm13, 112(%rsp)
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	movups	%xmm14, 128(%rsp)
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	movups	%xmm15, 144(%rsp)
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	movaps	%xmm3, %xmm0
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	movsd	STACK_ALPHA_I, %xmm1
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#endif
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	pxor	%xmm15, %xmm15
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	movq	STACK_C,   C
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	movq	STACK_LDC, LDC
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	testq	M, M
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	jle	.L999
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	testq	N, N
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	jle	.L999
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	salq	$ZBASE_SHIFT, LDC
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#ifdef DOUBLE
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	ucomisd	%xmm15, %xmm0
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	jne	.L71
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	ucomisd	%xmm15, %xmm1
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	jne	.L71
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#else
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	ucomiss	%xmm15, %xmm0
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	jne	.L71
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	ucomiss	%xmm15, %xmm1
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	jne	.L71
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#endif
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	ALIGN_2
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.L53:
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	movq	C, C1		# c_offset1 = c_offset
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	addq	LDC, C		# c_offset += ldc
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	movq	M,  I
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	sarq	$2, I
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	jle	.L56
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	ALIGN_2
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.L57:
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#ifdef OPTERON
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	prefetchw	64 * SIZE(C1)
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#endif
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	MOVSD	%xmm0, 0 * SIZE(C1)		# c_offset1
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	MOVSD	%xmm0, 1 * SIZE(C1)
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	MOVSD	%xmm0, 2 * SIZE(C1)
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	MOVSD	%xmm0, 3 * SIZE(C1)
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	MOVSD	%xmm0, 4 * SIZE(C1)
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	MOVSD	%xmm0, 5 * SIZE(C1)
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	MOVSD	%xmm0, 6 * SIZE(C1)
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	MOVSD	%xmm0, 7 * SIZE(C1)
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	addq	$8 * SIZE, C1		# c_offset1 += 8
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	decq	I			# i--
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	jg	.L57
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	ALIGN_2
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.L56:
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	movq	M,  I
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	andq	$3, I
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	jle	.L62
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	ALIGN_2
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.L63:
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	MOVSD	%xmm0, 0 * SIZE(C1)
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	MOVSD	%xmm0, 1 * SIZE(C1)
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	addq	$2 * SIZE,C1
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	decq	I
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	jg	.L63
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	ALIGN_2
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.L62:
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	decq	N			# j --
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	jg	.L53
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	jmp	.L999
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	ALIGN_3
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.L71:
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	movq	C, C1
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	addq	LDC, C		# c_offset += ldc
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	movq	M,  I
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	sarq	$1, I
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	jle	.L84
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	ALIGN_3
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.L85:
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#ifdef OPTERON
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	prefetchw	16 * SIZE(C1)
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#endif
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	MOVSD	0 * SIZE(C1), %xmm2
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	MOVSD	1 * SIZE(C1), %xmm3
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	MOVSD	0 * SIZE(C1), %xmm4
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	MOVSD	1 * SIZE(C1), %xmm5
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	MOVSD	2 * SIZE(C1), %xmm6
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	MOVSD	3 * SIZE(C1), %xmm7
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	MOVSD	2 * SIZE(C1), %xmm8
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	MOVSD	3 * SIZE(C1), %xmm9
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	MULSD	%xmm0, %xmm2
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	MULSD	%xmm1, %xmm3
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	MULSD	%xmm1, %xmm4
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	MULSD	%xmm0, %xmm5
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	MULSD	%xmm0, %xmm6
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	MULSD	%xmm1, %xmm7
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	MULSD	%xmm1, %xmm8
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	MULSD	%xmm0, %xmm9
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	SUBSD	%xmm3, %xmm2
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	ADDPD	%xmm5, %xmm4
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	SUBSD	%xmm7, %xmm6
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	ADDPD	%xmm9, %xmm8
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	MOVSD	%xmm2, 0 * SIZE(C1)
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	MOVSD	%xmm4, 1 * SIZE(C1)
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	MOVSD	%xmm6, 2 * SIZE(C1)
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	MOVSD	%xmm8, 3 * SIZE(C1)
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	addq	$4 * SIZE, C1
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	decq	I
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	jg	.L85
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	ALIGN_3
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.L84:
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	testq	$1, M
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	jle	.L74
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	ALIGN_3
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.L75:
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	prefetchnta	80 * SIZE(C1)
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	MOVSD	0 * SIZE(C1), %xmm2
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	MULSD	%xmm0, %xmm2
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	MOVSD	1 * SIZE(C1), %xmm3
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	MULSD	%xmm1, %xmm3
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	MOVSD	0 * SIZE(C1), %xmm4
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	MULSD	%xmm1, %xmm4
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	MOVSD	1 * SIZE(C1), %xmm5
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	MULSD	%xmm0, %xmm5
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	SUBSD	%xmm3, %xmm2
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	ADDPD	%xmm5, %xmm4
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	MOVSD	%xmm2, 0 * SIZE(C1)
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	MOVSD	%xmm4, 1 * SIZE(C1)
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	ALIGN_2
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.L74:
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	decq	N
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	jg	.L71
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	ALIGN_2
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.L999:
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#ifdef WINDOWS_ABI
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	movups	  0(%rsp), %xmm6
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	movups	 16(%rsp), %xmm7
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	movups	 32(%rsp), %xmm8
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	movups	 48(%rsp), %xmm9
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	movups	 64(%rsp), %xmm10
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	movups	 80(%rsp), %xmm11
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	movups	 96(%rsp), %xmm12
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	movups	112(%rsp), %xmm13
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	movups	128(%rsp), %xmm14
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	movups	144(%rsp), %xmm15
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	addq	$STACKSIZE, %rsp
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#endif
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	ret
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	EPILOGUE