Shinya Kitaoka 810553
#pragma once
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#ifndef TATOMICVAR_H
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#define TATOMICVAR_H
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#undef DVAPI
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#undef DVVAR
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#ifdef TNZCORE_EXPORTS
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#define DVAPI DV_EXPORT_API
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#define DVVAR DV_EXPORT_VAR
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#else
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#define DVAPI DV_IMPORT_API
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#define DVVAR DV_IMPORT_VAR
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#endif
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Shinya Kitaoka 9f5a1b
#ifdef _WIN32
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#include <windows.h></windows.h>
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#elif defined(__sgi)
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#include <sys atomic_ops.h=""></sys>
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#elif defined(LINUX)
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// #include <asm atomic.h=""></asm>
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// it's broken, either include the kernel header
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//   /usr/src/linux/include/asm/atomic.h
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// or copy it here
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#include "/usr/src/linux-2.4/include/asm/atomic.h"
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#elif defined(powerpc)
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// from linux-2.4.20-20.9/include/linux/asm-ppc
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typedef struct {
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	volatile int counter;
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} atomic_t;
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#define ATOMIC_INIT(i) \
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	{                  \
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		(i)            \
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	}
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#define atomic_read(v) ((v)->counter)
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#define atomic_set(v, i) (((v)->counter) = (i))
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extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
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extern void atomic_set_mask(unsigned long mask, unsigned long *addr);
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// we define it as we want to run on SMP dual processors...
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#define CONFIG_SMP
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#ifdef CONFIG_SMP
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#define SMP_ISYNC "\n\tisync"
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#else
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#define SMP_ISYNC
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#endif
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static __inline__ void atomic_add(int a, atomic_t *v)
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{
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	int t;
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	__asm__ __volatile__(
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		"1:	lwarx	%0,0,%3		\n\
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	add	%0,%2,%0\n\
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	stwcx.	%0,0,%3\n\
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	bne-	1b"
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		: "=&r"(t), "=m"(v->counter)
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		: "r"(a), "r"(&v->counter), "m"(v->counter)
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		: "cc");
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}
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static __inline__ int atomic_add_return(int a, atomic_t *v)
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{
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	int t;
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	__asm__ __volatile__(
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		"1:	lwarx	%0,0,%2		\n\
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	add	%0,%1,%0\n\
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	stwcx.	%0,0,%2\n\
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	bne-	1b" SMP_ISYNC
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		: "=&r"(t)
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		: "r"(a), "r"(&v->counter)
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		: "cc", "memory");
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	return t;
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}
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static __inline__ void atomic_sub(int a, atomic_t *v)
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{
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	int t;
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	__asm__ __volatile__(
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		"1:	lwarx	%0,0,%3		\n\
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	subf	%0,%2,%0\n\
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	stwcx.	%0,0,%3\n\
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	bne-	1b"
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		: "=&r"(t), "=m"(v->counter)
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		: "r"(a), "r"(&v->counter), "m"(v->counter)
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		: "cc");
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}
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static __inline__ int atomic_sub_return(int a, atomic_t *v)
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{
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	int t;
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	__asm__ __volatile__(
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		"1:	lwarx	%0,0,%2		\n\
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	subf	%0,%1,%0\n\
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	stwcx.	%0,0,%2\n\
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	bne-	1b" SMP_ISYNC
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		: "=&r"(t)
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		: "r"(a), "r"(&v->counter)
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		: "cc", "memory");
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	return t;
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}
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static __inline__ void atomic_inc(atomic_t *v)
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{
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	int t;
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	__asm__ __volatile__(
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		"1:	lwarx	%0,0,%2		\n\
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	addic	%0,%0,1\n\
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	stwcx.	%0,0,%2\n\
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	bne-	1b"
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		: "=&r"(t), "=m"(v->counter)
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		: "r"(&v->counter), "m"(v->counter)
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		: "cc");
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}
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static __inline__ int atomic_inc_return(atomic_t *v)
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{
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	int t;
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	__asm__ __volatile__(
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		"1:	lwarx	%0,0,%1		\n\
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	addic	%0,%0,1\n\
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	stwcx.	%0,0,%1\n\
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	bne-	1b" SMP_ISYNC
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		: "=&r"(t)
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		: "r"(&v->counter)
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		: "cc", "memory");
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	return t;
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}
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static __inline__ void atomic_dec(atomic_t *v)
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{
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	int t;
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	__asm__ __volatile__(
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		"1:	lwarx	%0,0,%2		\n\
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	addic	%0,%0,-1\n\
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	stwcx.	%0,0,%2\n\
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	bne-	1b"
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		: "=&r"(t), "=m"(v->counter)
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		: "r"(&v->counter), "m"(v->counter)
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		: "cc");
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}
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static __inline__ int atomic_dec_return(atomic_t *v)
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{
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	int t;
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	__asm__ __volatile__(
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		"1:	lwarx	%0,0,%1		\n\
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	addic	%0,%0,-1\n\
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	stwcx.	%0,0,%1\n\
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	bne-	1b" SMP_ISYNC
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		: "=&r"(t)
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		: "r"(&v->counter)
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		: "cc", "memory");
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	return t;
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}
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#elif defined(i386)
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#include <atomic></atomic>
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typedef std::atomic<int> atomic_t;</int>
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static __inline__ void atomic_set(atomic_t *v, const int value)
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{
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	v->store(value);
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}
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static __inline__ int atomic_inc_return(atomic_t *v)
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{
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	return v->fetch_add(1) + 1; // post increment atomic
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}
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static __inline__ int atomic_dec_return(atomic_t *v)
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{
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	return v->fetch_sub(1) - 1; // post decriment atomic
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}
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static __inline__ int atomic_read(const atomic_t *v)
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{
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	return v->load();
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}
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static __inline__ int atomic_add(int num, const atomic_t *v)
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{
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	return const_cast<atomic_t *="">(v)->fetch_add(num) + num; /* なんで const つけた? */</atomic_t>
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}
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#else
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@ @PLATFORM NOT SUPPORTED !@ @
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#endif
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/*! Platform specific 
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    Provides class with increment & decrement absolutely done in interlocked way 
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*/
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class DVAPI TAtomicVar
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{
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public:
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#if defined(LINUX) || defined(MACOSX)
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	TAtomicVar()
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	{
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		atomic_set(&m_var, 0);
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	}
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#else
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	TAtomicVar() : m_var(0)
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	{
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	}
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#endif
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	long operator++()
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	{
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#ifdef _WIN32
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		return InterlockedIncrement(&m_var);
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#elif defined(__sgi)
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		return ++m_var;
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#elif defined(LINUX)
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		// atomic_inc(&m_var);
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		// return atomic_read(&m_var);
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		//  this is broken as it can return a value != from ++m_var
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		atomic_inc(&m_var);
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		return atomic_read(&m_var);
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#elif defined(MACOSX)
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		return atomic_inc_return(&m_var);
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#endif
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	}
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	long operator+=(long value)
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	{
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#ifdef _WIN32
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		InterlockedExchangeAdd(&m_var, value);
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		return m_var;
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#elif defined(__sgi)
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		m_var += value;
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		return m_var;
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#elif defined(LINUX)
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		// atomic_inc(&m_var);
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		// return atomic_read(&m_var);
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		//  this is broken as it can return a value != from ++m_var
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		assert(false);
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		return m_var;
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#elif defined(MACOSX)
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		atomic_add(value, &m_var);
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		return atomic_read(&m_var);
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#endif
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	}
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	long operator--()
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	{
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#ifdef _WIN32
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		return InterlockedDecrement(&m_var);
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#elif defined(__sgi)
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		return --m_var;
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#elif defined(LINUX)
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		// atomic_dec(&m_var);
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		// return atomic_read(&m_var);
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		// broken as above...
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		atomic_dec(&m_var);
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		return atomic_read(&m_var);
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#elif defined(MACOSX)
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		// atomic_dec(&m_var);
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		// return atomic_read(&m_var);
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		// broken as above...
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		return atomic_dec_return(&m_var);
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#endif
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	}
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	bool operator<=(const long &rhs)
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	{
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#if defined(LINUX) || defined(MACOSX)
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		return atomic_read(&m_var) <= rhs;
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#else
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		return m_var <= rhs;
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#endif
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	};
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	operator long() const
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	{
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#if defined(LINUX) || defined(MACOSX)
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		return atomic_read(&m_var);
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#else
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		return m_var;
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#endif
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	};
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#ifdef _WIN32
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	long m_var;
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#elif defined(__sgi)
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	long m_var;
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#elif defined(LINUX) || defined(MACOSX)
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	atomic_t m_var;
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#endif
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#if !defined(LINUX) || defined(LINUX) && (__GNUC__ == 3) && (__GNUC_MINOR__ > 1)
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private: // to avoid well known bug in gcc3 ... fixed in later versions..
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#endif
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	TAtomicVar &operator=(const TAtomicVar &); //not implemented
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	TAtomicVar(const TAtomicVar &v);		   //not implemented
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};
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#endif